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CWE-1313

ハードウェアにより、実行時にテストまたはデバッグ・ロジックを起動可能

Hardware Allows Activation of Test or Debug Logic at Runtime
脆弱性 レビュー中
JA

ランタイム中、ハードウェアはテストまたはデバッグ・ロジック(機能)を起動することができ、ハードウェアの状態を変更することができます。この機能は、システムの意図された動作を変更し、敵による機密データの改ざんや漏洩を可能にする可能性があります。

敵は、システムの意図された動作を変更するために、通常動作中にハードウェアからアクセス可能なテストまたはデバッグ・ロジックを利用することができます。例えば、アクセス可能なテスト/デバッグ・モードは、あらゆるシステム・データへのリード/ライト・アクセスを許すかもしれません。バス上の送受信動作中にエラーインジェクション(一般的なテスト/デバッグ機能)を使用すると、意図しないメッセージを生成するようにデータが変更される可能性があります。同様に、機密へのアクセスを許可するような機能によって、機密性が損なわれる可能性がある。

EN

During runtime, the hardware allows for test or debug logic (feature) to be activated, which allows for changing the state of the hardware. This feature can alter the intended behavior of the system and allow for alteration and leakage of sensitive data by an adversary.

An adversary can take advantage of test or debug logic that is made accessible through the hardware during normal operation to modify the intended behavior of the system. For example, an accessible Test/debug mode may allow read/write access to any system data. Using error injection (a common test/debug feature) during a transmit/receive operation on a bus, data may be modified to produce an unintended message. Similarly, confidentiality could be compromised by such features allowing access to secrets.

Scope: Confidentiality, Integrity, Availability / Impact: Modify Memory; Read Memory; DoS: Crash, Exit, or Restart; DoS: Instability; DoS: Resource Consumption (CPU); DoS: Resource Consumption (Memory); DoS: Resource Consumption (Other); Execute Unauthorized Code or Commands; Gain Privileges or Assume Identity; Bypass Protection Mechanism; Alter Execution Logic; Quality Degradation; Unexpected State; Reduce Performance; Reduce Reliability
Insert restrictions on when the hardware's test or debug features can be activated. For example, during normal operating modes, the hardware's privileged modes that allow access to such features cannot be activated. Configuring the hardware to only enter a test or debug mode within a window of opportunity such as during boot or configuration stage. The result is disablement of such test/debug features and associated modes during normal runtime operations.
Insert restrictions on when the hardware's test or debug features can be activated. For example, during normal operating modes, the hardware's privileged modes that allow access to such features cannot be activated. Configuring the hardware to only enter a test or debug mode within a window of opportunity such as during boot or configuration stage. The result is disablement of such test/debug features and associated modes during normal runtime operations.
Insert restrictions on when the hardware's test or debug features can be activated. For example, during normal operating modes, the hardware's privileged modes that allow access to such features cannot be activated. Configuring the hardware to only enter a test or debug mode within a window of opportunity such as during boot or configuration stage. The result is disablement of such test/debug features and associated modes during normal runtime operations.
MITRE公式ページ — CWE-1313